1. Field of the Invention
The present invention relates to a frequency locking method and a frequency locking circuit, and particularly relates to a frequency locking method and a frequency locking circuit, which adjusts a normalization factor such that the product of a normalization factor and an oscillator gain approaches to a predetermined produce. The present invention also relates to an oscillator gain anticipating method and an oscillator gain anticipating circuit.
2. Description of the Prior Art
FIG. 1 is a block diagram illustrating a prior art frequency locking circuit 100. As shown in FIG. 1, the frequency locking circuit 100 includes a frequency detector 101, a low pass filter 103, a controllable oscillator 105 and a frequency divider 107. The output signal Sout is frequency-divided by the frequency divider 107 to generate a frequency-divided output signal Soutf. Then the frequency-divided output signal Soutf is transmitted to the frequency detector 101. The frequency divider 101 transmits a control signal CS after comparing a frequency of the frequency-divided output signal Soutf and a target frequency Ftarget. The control signal CS is filtered by the low pass filter 103 and then be transmitted to the controllable oscillator 105 to adjust the output signal Sout. By this way, the frequency-divided output signal Soutf is locked to the target frequency Ftarget, that is, the output signal Sout is locked to N times Ftarget (N is the frequency dividing ratio of the frequency divider 107).
If the output signal Sout is desired to be quickly locked, a popular method is to increase the bandwidth of the low pass filter 103, or to utilize an extra oscillator gain calibrator to acquire the oscillator gain. The first method causes the difficulty to restrain low frequency noise. The second method, such as the concept shown in U.S. Pat. Nos. 6,894,570 and 6,459,253, needs long calibration time, complicated computing method and a larger circuit area.
In view of above-mentioned embodiments, the output signal frequency can be rapidly adjusted without adding a pre controllable oscillator gain anticipating circuit and changing the bandwidth. Besides, the oscillator gain can be acquired in the background mode, Additionally, since the gain of the controllable oscillator is detected in the background mode, the output frequency can rapidly approach to the target frequency, and the drift for oscillator gain can be compensated due to temperature variation. Moreover, the advantage that the loop bandwidth value is fixed is also provided, such that the loop bandwidth can avoid the effect from process variation.